1. Field of Invention
This invention relates generally to the field of semiconductor manufacturing. More particularly, this invention relates to a method for hardening a developed patterned photoresist material layer disposed on a surface of a substrate of a semiconductor wafer.
2. Background of the Invention
The fabrication of integrated circuits requires the introduction of precisely controlled quantities of materials into microscopic regions of a substrate of a semiconductor wafer. The patterns that define such microscopic regions are created by a lithographic process. The basic sequences of steps that comprise the lithographic process include cleaning the substrate, coating the substrate with a photoresist material layer, baking the photoresist material layer, exposing the baked or cured photoresist material layer, developing the exposed photoresist material layer to form masked and unmasked regions of the substrate, baking the developed photoresist material layer, etching the unmasked regions of the substrate, and stripping the developed photoresist material layer away from the masked (i.e. non-etched) regions of the substrate.
Initially, the substrate is cleaned to remove dirt or other contaminating particles so that the subsequent steps in the lithographic process are not adversely affected. Following cleaning, a surface of the substrate of the wafer is coated with a uniform, adherent, defect-free polymeric layer of predetermined thickness of photoresist material. After the substrate is coated with the photoresist material layer, it is usually subjected to a soft-bake or pre-bake step. In this step the substrate is subjected to an elevated temperature to drive out solvents from the photoresist material layer, to improve the adhesion of the photoresist material to the surface of the substrate, and to anneal the stresses caused by the shear forces encountered in the spinning process.
After the substrate has been coated with the photoresist material and suitably soft-baked, it is exposed to some form of radiation in order to create a latent image in the photoresist material. Following exposure, the photoresist material layer is developed in order to leave behind the image which will serve as the mask for etching, ion-implantation, or other subsequent processing steps. Following development an inspection is performed to ensure that the steps of the lithographic process up to this point have been performed correctly and to within the specified tolerance. Mistakes or unacceptable process variations can still be corrected, since the lithographic process has not yet produced any changes; that is, for example, the substrate of the wafer has not been etched or otherwise removed. Thus, an inadequately processed wafer can be reworked by merely stripping away the developed photoresist material layer and starting the lithographic process over again.
Post-baking is a process step which subjects the developed photoresist material layer on the substrate to an elevated temperature. The post-baking step is usually performed after development but, generally, just prior to the etching step. Post-baking is performed in order to remove residual solvents in the developed photoresist material layer so as to improve its adhesion to the substrate, and to increase the etch resistance of the photoresist material. Etch resistance is the ability of a photoresist material to endure the etching procedure during the pattern transfer process.
It is necessary to tightly control the fine feature sizes of the pattern of the developed photoresist material layer disposed on the substrate of the wafer while the wafer is being subjected to a variety of manufacturing processes that involve elevated temperatures. During processes such as ion implantation or plasma etching, for example, the temperature can rise high enough to cause the developed photoresist material layer to flow. Also, some post-bake procedures are designed to expose the developed photoresist material layer to a temperature that is sufficiently high enough to cause it to flow thereby reducing the incidence of pinholes or thin spots therein prior to etching. However, such flow of the developed photoresist material layer may also reduce the resolution of the features in the original pattern. In response, it is known that, prior to etching, simultaneously heating the developed photoresist material layer with a heat source and irradiating it with a UV light source will harden the developed photoresist material layer and make it more resistant to flow. It is also known to use UV photostabilization to condition the developed photoresist material layer prior to subjecting it to the harsh dry etching conditions that are used in subsequent processing steps.
The etch resistance of a photoresist material layer may also be affected by ion implantation with a high-dose, low-energy beam. During ion implantation, energetic, charged atoms or molecules of an implant species (e.g. argon, arsenic, boron, etc.) are directly introduced into a substrate. It is known to use a bi-directional ion implantation to further harden a developed photoresist material layer. During the bidirectional ion implantation, atoms of an inert material, such as argon, are directed to and implanted into the developed photoresist material layer disposed on the substrate of the wafer. In a well known manner, the wafer is repositioned by rotating it 180 degrees. Then, the argon atoms are again directed to and implanted into the developed photoresist material layer. After the developed photoresist material layer is hardened through UV curing and implantation, unmasked regions of the substrate are etched. Then, the developed photoresist material layer is stripped off from masked or non-etched regions of the substrate of the wafer.
A shortcoming of the foregoing approach is that during the etch step, the developed photoresist material layer is prone to flaking. Flaking is the erosion or collapse of a sidewall of the developed photoresist layer during etch caused by non-uniform hardening of the photoresist during implanting. Flaking occurs when holes develop in the sidewall of the developed photoresist material layer. Such holes are visible using a scanning electron microscope (SEM) under 40,000 times magnification. Flaking results in contaminating particles which cause connectivity and other problems in the subsequently fabricated semiconductor device. Also, flaking of the developed photoresist material layer erodes the mask that covers portions of the substrate that are not to be etched. Flaking causes the loss of control of the critical dimensions necessary to fabricate modern integrated circuits. There is, therefore, a need to provide a process for hardening and increasing the etch resistance of a developed and patterned photoresist material layer disposed on a substrate of a wafer such that when the developed photoresist material layer is etched it does not flake.